Open Processor for Machine Learning: from FPGA Overlays to Runtime Reconfigurables

Speaker Name
Professor Lei He
Speaker Title
Professor, Electrical Engineering, UCLA
Speaker Organization
UCLA Electrical and Computer Engineering Department
Start Time
End Time
Virtual Event and Engineering 2-192

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Abstract: Instruction set architecture (ISA) is arguably most critical for computing and related processor chips. CPU is historically dominated by X86 and ARM instruction sets, but RISC-V has recently become a viable alternative. RISC-V is an open-source ISA developed originally at UC Berkeley. It dramatically lowers the barrier for CPU design and customization and leads to significant gain for domain specific applications at reduced NRE (non recuring) cost.

AI is computing power hungry and constantly changing, making it an ideal case for customized computing. Yet open-source ISA is not available for AI computing. This talk introduces an open-source ISA under development for machine learning at UCLA. It has been implemented as FPGA overlay processor OPU (with details at OPU obtains promising results for CNN, light-weigh CNN, transposed CNN, BERT, and GCN with little changes to the original ISA and microarchitecture. Such small changes also enable runtime re-configuration for further performance improvement and lead to runtimereconfigurable OPU2 under development.

Bio: Dr. Lei He obtained Ph.D. degree in computer science from UCLA in 1999 and is a professor with UCLA electrical engineering department since 2002. Before that, he participated in Itanium processor development at HP Labs, and was a faculty member at University of Wisconsin, Madison between 1999 and 2002. His research interests include design automation, FPGA, computer architecture, and AI and IoT for education, health care, and sustainability. He has published over 250 technical papers with many best paper awards including the 2010 ACM Transactions on Electronic System Design Automation Best Paper Award and the 2011 IEEE Circuit and System Society Darlington Best Paper Award. He also consulted Cadence Design Systems, Cisco, Intel, and Synopsys, and was a founding technical advisory board member for Apache Design Solutions, Rio Design Automation and CATL (one of the largest EV battery producers).

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