Santa Cruz, CA—Google announced that four professors from the Jack Baskin School of Engineering at UC Santa Cruz’s Computer Science and Engineering department will receive Google Faculty Research Awards in 2020.
Professor and Associate Dean for Graduate Studies Matthew Guthaus, Professor Lise Getoor, Assistant Professor Lindsey Kuper, and Professor Jose Renau will each partner with the company’s researchers. They will also receive funding and support, which includes tuition for a graduate student.
Matthew Guthaus works with computer memory and chip design. “There’s a big interest in developing open-source hardware,” he said. “In the past you’d have to license technologies, which makes it prohibitively expensive to create new chips.”
Open source refers to the practice of releasing code ‘into the wild’ and allowing users to alter it in exchange for keeping the code available to others. The open-source software movement accelerated innovation in the industry and helped many startups (including Google).
Guthaus’ tools enable custom chip designs for Machine Learning and Artificial Intelligence applications. “What I’m working with Google on is an ecosystem of software tools to help chip design,” Guthaus said. “My particular area of focus is tools to make memories on chips.”
Lise Getoor created a powerful open-source machine learning framework for developing probabilistic models called Probabilistic Soft Logic (PSL). It works particularly well for combining different kinds of information, which is useful for many of the enormous recommendation systems that Google builds.
Her Google Award will support the development of techniques to use PSL for integrating rules and embeddings, eventually supporting online discussions about preferences by having the ability to reason efficiently about sets and follow relational chains of reasoning.
Lindsey Kuper describes her research as falling at the intersection of three different topics: “Programming languages, which is kind of the study of how to come up with the right language-level abstractions to express certain problems (and solve them); distributed systems, which are [failure-prone] networks of interacting, independent components; and software verification, which is the study of ‘how do we formally establish that a piece of software does what we say it does.’”
Data is often duplicated throughout distributed systems (for redundancy or speeding up retrieval times, for example). However, the complexity and fragility of distributed systems means this data often falls out of sync. Her project looks for ways to reason about the consistency of replicas using a technology called Satisfiability Modulo Theories (SMT) solvers, eventually hoping to develop custom solvers specifically tailored to tackle this problem.
Jose Renau researches computer architecture with a particular emphasis on designing processors for phones, servers, hardware accelerators. Designing chips is an enormously complicated operation given billions of transistors in a typical chip. To tackle the challenge, hardware designers use special programming languages to describe digital systems. Renau’s team is working building new hardware languages (Pyrope) and an open source Live Hardware Development (LiveHD) infrastructure to support fast and scalable hardware design.
The Google Award will fund the development of a language-neutral interface to the open source hardware infrastructure and its capacity to handle new hardware languages like Pyrope. The result will be an incremental, scalable synthesis and simulation flow.
“What I’ve been focusing on in the last year is how to improve productivity,” Renau said. “The Google Award overlaps with a larger [$1.3mm] Army grant we’ve been working on for the past three years that’s looking how to improve hardware productivity, how to design accelerators much more efficiently.”
Having a language-neutral hardware platform will make it much easier to port-in other devices and programs and save engineering teams from having to replicate software in other languages. The common architecture also means that smaller, incremental changes can be made automatically—a big advantage in the design and manufacture of something as complex as a processor.